Setup Fixing:
1. Cell swaping from Hvt LVT
2. Upsize the bottleneck drivers(preffered buffers and inverters)
3. Split the fanout
4. Clone the critical cell
5. Clock_skewing (either launch or capture)
Hold Fixing:
1. Cell swpping to HVT in data path
2. Inserting buffer @ endpoint if setup margin is there
3. If endpoint cell area is high density route the nets in lower layers
Noise/Double Switching Fixing:
1. Applying NDR to the nets (so that space will be increase)
2. Sheilding
3. Upsizing the victim Net Driver
VLSI Interview Questions and Answers
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